SAN FRANCISCO, CA – September 18, 2026 – As the global semiconductor industry grapples with the dual challenges of hyper-scaled manufacturing and the insatiable demand for high-performance computing, the Electronic System Design Alliance (ESDA)—a SEMI Technology Coalition—has announced a pivotal day-long summit. Titled “Bridging Design and Manufacturing with AI,” the event will serve as a cornerstone of the upcoming SEMICON® West 2026, scheduled for Tuesday, October 13, at the Moscone Center in San Francisco.
The session arrives at a critical inflection point for the industry. With Moore’s Law facing physical and economic headwinds, the integration of Artificial Intelligence into the EDA (Electronic Design Automation) workflow is no longer an optional upgrade; it has become an existential requirement for companies aiming to maintain competitive velocity.
The Convergence of Design and AI: Setting the Stage
The event is organized by an industry-leading committee, including Julie Rogers, Executive Director of the ESDA, and Ming Zhang, Vice President at PDF Solutions. Zhang, who will serve as the event chair and morning moderator, has emphasized that the goal of the summit is to break down the traditional silos between design engineering and fabrication facilities.
"We are moving past the era where design and manufacturing were treated as distinct, sequential steps," says Zhang. "By leveraging AI, we are creating a feedback loop that allows the physical limitations of the fab to inform the design process in real-time, effectively collapsing the time-to-market cycle."
The day’s agenda is structured to provide a holistic view of the semiconductor lifecycle, moving from theoretical AI scaling strategies to the granular economic realities of deploying agentic AI in a production environment.
Chronology of the Summit: From Keynote to Closing
The program begins at 10:30 a.m. with a high-stakes keynote address from Dr. L.C. Lu, Senior Fellow and Vice President of Research & Development/Design and Technology Platform at TSMC. His presentation, "Scaling Leadership Silicon with AI," is expected to provide an insider’s look at how the world’s leading foundry is utilizing machine learning to optimize the production of sub-2nm nodes.
Following Dr. Lu’s insights, the morning session will feature a series of technical deep dives from the industry’s most prominent players, including Applied Materials, Cadence, Cerebras, Intel Foundry, Lam Research, PDF Solutions, and VerifAIX. These sessions will explore the tactical implementation of AI, focusing on areas such as predictive maintenance, yield optimization, and generative design automation.
The afternoon session shifts focus toward strategy and operational efficiency. Aaron Aboagye, Managing Partner of McKinsey & Company’s Detroit office and Co-Lead of the McKinsey Semiconductors Practice in the Americas, will present "Design at AI Speed: How AI Can Compress Time-to-Silicon." Aboagye’s address is highly anticipated, as industry leaders look for empirical data on how AI-driven workflows can materially impact bottom-line profitability and R&D throughput.
The day will conclude with a high-level panel moderated by industry veteran Wally Rhines, CEO of Silvaco. The panel, "The True Value and Cost of Agentic AI in SoC Design and Manufacturing," will be hosted by the IEEE and is expected to provide a frank assessment of the ROI associated with autonomous AI systems in complex system-on-chip (SoC) architectures.
Supporting Data and Industry Context
The importance of this event cannot be overstated. According to recent industry projections, the complexity of designing a modern SoC has grown exponentially, with design costs for leading-edge nodes surpassing $500 million. Without AI-driven automation, the engineering talent shortage currently facing the global semiconductor sector would create a permanent bottleneck.
The speakers represent a "who’s who" of the semiconductor ecosystem. By bringing together EDA giants like Cadence and manufacturing heavyweights like Lam Research and Applied Materials, the ESDA is facilitating a rare cross-pollination of data. The focus on "Agentic AI"—systems capable of making autonomous decisions within a design workflow—represents a significant leap forward from the pattern-matching AI tools used in years past.
The session will cover:
- Design-to-Fab Feedback Loops: Using AI to feed manufacturing variance data back into early-stage design tools.
- Autonomous Verification: Reducing the verification burden through AI-driven test pattern generation.
- Yield Enhancement: Predictive analytics to identify manufacturing hotspots before a wafer ever hits the production line.
- Resource Allocation: Using AI to optimize the distribution of compute power during massive multi-physics simulations.
Official Perspectives: The Value of the ESDA Ecosystem
The Electronic System Design Alliance, as a SEMI Technology Coalition, serves as the primary forum for this discourse. In an era of increasing geopolitical fragmentation of the semiconductor supply chain, the ESDA has doubled down on its role as a neutral ground for technical and legislative discussion.
"Our mission is to ensure that the design ecosystem remains the engine of the global electronics industry," says Julie Rogers. "By bringing together these specific companies, we are not just hosting a conference; we are building a roadmap for the next decade of semiconductor innovation."
The involvement of leaders from McKinsey and the IEEE adds a layer of economic and academic rigor to the event. As companies move toward AI-centric manufacturing, they are also navigating a shift in the labor market. The need for engineers who are as fluent in machine learning architectures as they are in VLSI design is creating a new category of "AI-enabled hardware architects."
Implications for the Semiconductor Industry
The implications of the “Bridging Design and Manufacturing with AI” summit are broad, touching on every segment of the electronics industry, from consumer mobile devices to high-performance AI data centers.
1. The Death of Sequential Design
Historically, the "toss-over-the-wall" approach—where designers complete a chip and hand it to the fab—has led to significant delays and yield loss. The integration of AI tools, which act as a bridge, promises a "co-design" environment where fabrication constraints are inherently baked into the initial design software. This could reduce tape-out failure rates by double-digit percentages.
2. The Economic Impact of Agentic AI
Wally Rhines’ panel will address a question that keeps many CFOs awake at night: Is the massive investment in AI infrastructure delivering a proportional return? As semiconductor firms invest billions in proprietary LLMs and neural networks to assist in chip design, the industry must determine if these costs are sustainable or if they will lead to a new form of "AI-driven inflation" in the cost of silicon.
3. Sustainability and Resource Efficiency
Beyond speed, the environmental impact of AI-assisted design is significant. By using AI to optimize chip layouts for power efficiency and thermal performance, designers are effectively reducing the energy footprint of the final hardware. Furthermore, by improving yield in the fab, AI reduces the amount of wasted silicon—a crucial goal for an industry under intense scrutiny regarding its carbon footprint.
Registration and Logistics
The session is open to all attendees of SEMICON West 2026. Given the high interest in the topic of AI-driven manufacturing, organizers are encouraging early registration. Lunch will be provided by ESDA/SEMI on a first-come, first-served basis, and an evening reception will follow the final panel from 4:00 p.m. to 5:00 p.m., providing an opportunity for networking between the panelists and attendees.
Event Details at a Glance:
- Date: Tuesday, October 13, 2026
- Time: 10:30 a.m. – 4:00 p.m.
- Location: Moscone Center, North Hall, Lower Level, Room 20, San Francisco, CA
- Registration: Available via the official SEMICON West event portal.
As the industry converges on San Francisco this October, the ESDA’s Design Session stands as a critical checkpoint. It is a moment for the industry to move beyond the hype cycle of Artificial Intelligence and confront the technical, economic, and practical realities of integrating these tools into the heart of semiconductor manufacturing. Whether the industry can successfully bridge the gap between design and fab will ultimately define the performance and affordability of the chips that will power the world of 2030 and beyond.
